Tilera has recently introduced world's first 100-core processor.The model named as Tilera 100-core Tile-GX Processor.The TILE-Gx family, fabricated in TSMC's 40 nanometer process, operates at up to 1.5 GHz with power consumption ranging from 10 to 55 watts. The TILE-Gx family incorporates many cores on a single chip together with integrated memory controllers and a set of I/O. However the TILE-Gx device also brings together a number of new features to maximize application performance while offering the best performance-per-watt in the industry.
"The launch of the TILE-Gx family, including the world's first 100-core microprocessor, ushers in a new era of many-core processing. We believe this next generation of high-core count, ultra high-performance chips will open completely new computing possibilities," said Tilera's Omid Tahernia.
PROCESSOR'S FEATURES:
* New three-issue 64-bit core with full virtual memory system. Each core includes 32KB L1 I-cache, 32KB L1 D-cache and 256KB L2 cache, with up to 26MB total L3 coherent cache across the device.
* Enhanced SIMD instruction extensions: Improved signal processing performance with a 4 MAC/cycle multiplier unit delivering up to 600 billion MACs per second.
* Integrated high-performance DDR3 memory controllers: Two or four 72-bit controllers running up to 2133 MHz speeds with ECC support. Up to 1TB total capacity.
* Hardware acceleration engines: On-chip MiCA (Multistream iMesh Crypto Accelerator) system delivers up to 40Gbps encryption and 20Gbps full duplex compression processing, tightly coupled to the iMesh for extremely low latency and wire-speed small packet throughput. In addition, a high-performance true random number generator (RNG) and public key accelerator enable up to 50,000 RSA handshakes per second.
* Packet processing accelerator: mPIPE (multicore Programmable Intelligent Packet Engine) system provides wire-speed packet classification, load balancing and buffer management. This C-programmable engine delivers 80 Gbps and 120 million packets-per-second of throughput for packets with multiple layers of encapsulation.
Get Informer means To Get Informed on All Information Here. Fun, Songs, Videos, Latest Pictures, Google Ad sense, Urdu SMS, Poetry, Cricket and More. Just Keep Visiting For more Updates
"The launch of the TILE-Gx family, including the world's first 100-core microprocessor, ushers in a new era of many-core processing. We believe this next generation of high-core count, ultra high-performance chips will open completely new computing possibilities," said Tilera's Omid Tahernia.
PROCESSOR'S FEATURES:
* New three-issue 64-bit core with full virtual memory system. Each core includes 32KB L1 I-cache, 32KB L1 D-cache and 256KB L2 cache, with up to 26MB total L3 coherent cache across the device.
* Enhanced SIMD instruction extensions: Improved signal processing performance with a 4 MAC/cycle multiplier unit delivering up to 600 billion MACs per second.
* Integrated high-performance DDR3 memory controllers: Two or four 72-bit controllers running up to 2133 MHz speeds with ECC support. Up to 1TB total capacity.
* Hardware acceleration engines: On-chip MiCA (Multistream iMesh Crypto Accelerator) system delivers up to 40Gbps encryption and 20Gbps full duplex compression processing, tightly coupled to the iMesh for extremely low latency and wire-speed small packet throughput. In addition, a high-performance true random number generator (RNG) and public key accelerator enable up to 50,000 RSA handshakes per second.
* Packet processing accelerator: mPIPE (multicore Programmable Intelligent Packet Engine) system provides wire-speed packet classification, load balancing and buffer management. This C-programmable engine delivers 80 Gbps and 120 million packets-per-second of throughput for packets with multiple layers of encapsulation.
Get Informer means To Get Informed on All Information Here. Fun, Songs, Videos, Latest Pictures, Google Ad sense, Urdu SMS, Poetry, Cricket and More. Just Keep Visiting For more Updates
Post Title
→Tilera 100-core Tile-GX Processor with Block Diagram
Post URL
→https://aciksexygirl.blogspot.com/2009/10/tilera-100-core-tile-gx-processor-with.html
Visit Acik Sexy Girl for Daily Updated Wedding Dresses Collection
